The present invention is directed to an apparatus which is adaptable for use as an information storage device. In particular, the preferred embodiment of the present invention is useful as a data storage device for a superscalar computing apparatus.
A superscalar computing apparatus is a computing apparatus which executes more than one instruction per clock cycle. In achieving that level of operational efficiency, it is desirable that the instructions to be executed by the computing apparatus be stored in a data storage device and fetched from the data storage device in groups, or fetch-batches. That is, when the apparatus is interrogated, more than one instruction is fetched at a time so that the instructions may be queued and ready for execution by the computing apparatus, thus ensuring that inefficiencies in operation of the computing apparatus are not occasioned by lack of an available instruction for execution.
For example, in prior art devices utilized in such superscalar applications, a fetch-batch of four instructions may be fetched at a time. Such prior art data storage devices have an array of storage cells arranged in rows of four cells each with the cells in the respective rows being arranged in columns. A matrix of storage cells is thus presented consisting of four columns and n rows, with n depending upon various parameters such as computation speed, fetch speed, and the like.
Read lines are associated with each column, and operative connection of a respective cell within a column with its associated read lines enables fetching of the instruction stored within that particular cell.
In such prior art devices, only one row at a time is selectable. Therefore, if it is required that an instruction set (i.e., a four-instruction fetch-batch) begins at a column other than the first column, fetching will begin with the designated beginning second, third, or fourth column, and the remainder of that particular row of instructions is fetched. With such an arrangement, instructions in columns within the selected row which precede the designated beginning column are "thrown away". Thus, the full four-instruction fetch capability is not efficiently utilized and fetchable instructions within the selected row are wasted.
The present invention allows selective designation of particular cells in more than one row within a matrix and, in the preferred embodiment, provides for fetching of a fetch-batch of four consecutive instructions no matter which column the first designated instruction occupies. Thus, the present invention presents no architectural limitation to full employment of the fetch capability of the superscalar computing apparatus without wasting instructions.